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3 synchronized stories carry this tag.

Google adds long-context embedding support to vLLM on Cloud TPU

Google integrated TPU support for Qwen3 text and multimodal embedding workloads into vLLM, including tensor alignment, JAX and XLA pre-warming, and a StepPool path that preserves pooling state through chunked prefill and request preemption. Public GKE and AI Hypercomputer recipes cover 8B text and vision-language checkpoints.

Why it matters: Embedding services can now use a common open serving engine across TPU and other accelerators while testing long-context numerical parity. The public recipes make the serving claim reproducible instead of leaving it as a managed-platform promise.

Read storyOriginal source · developers.googleblog.com

Google splits its eighth-generation TPU into training and inference chips

Google introduced TPU 8t for large-scale training and TPU 8i for low-latency inference and agent workloads. The company described 8t superpods scaling to 9,600 chips and 2 PB of shared high-bandwidth memory, while 8i emphasized memory bandwidth, on-chip SRAM and low-latency collectives; general availability was planned for later in 2026.

Why it matters: Training and inference are diverging enough to justify different silicon and system designs. Agent workloads amplify small latency, memory and networking inefficiencies because many model calls and workers interact in a single user task.

Read storyOriginal source · blog.google

Google details Ironwood superpods but general availability remains ahead

Google Cloud announced that its seventh-generation Ironwood TPU would become generally available in the coming weeks, with superpods scaling to 9,216 chips and 1.77 petabytes of shared high-bandwidth memory.

Why it matters: Custom accelerators were being sold as complete inference systems—chips, interconnect, memory, scheduling, and serving software—rather than isolated silicon.

Read storyOriginal source · cloud.google.com