Cadence opens Maestro chip-design models to select early-access customers
Cadence announced Maestro, a portfolio of domain-specialized models that its AI Super Agents can combine with frontier and open-weight models across chip and system design. The first models are available to select early-access customers in Q4 2026, with cloud, public-cloud and customer-controlled on-premises deployment paths.
Why it matters: A major EDA vendor is moving domain models, deterministic solvers and reinforcement-learning feedback into production chip-design workflows. This could change how teams evaluate model authority, proprietary-design isolation and solver-grounded improvement,…